1. Field of the Invention
The present invention relates to a laminated capacitor suitably used for decoupling.
2. Description of the Related Technology
A laminated capacitor used for decoupling is required to have high electrostatic capacitance and low ESL (Equivalent Series Inductance). PCT Japanese Translation Patent Publication No. 2002-508114 and Japanese Unexamined Patent Application Publication No. 2002-151349 disclose laminated capacitors of that type.
The laminated capacitor disclosed in PCT Japanese Translation Patent Publication No. 2002-508114 comprises a parallelepiped dielectric chip and a total of eight outer electrodes arranged such that four outer electrodes are disposed on each of opposite side surfaces of the dielectric chip in the direction of width thereof and are alternately supplied with different polarities. The dielectric chip has an integral structure formed by alternately laminating a first inner conductor layer having a total of four outer electrode-adapted lead-out portions which are disposed in units of two at each of opposite side edges of the first inner conductor layer in the direction of width thereof and a second inner conductor layer having a total of four outer electrode-adapted lead-out portions which are disposed in units of two at each of opposite side edges of the second inner conductor layer in the direction of width thereof and which are arranged at different positions from the lead-out portions of the first inner conductor layer, while a dielectric layer is interposed between the first and second inner conductor layers. The four lead-out portions of each first inner conductor layer are connected to the four outer electrodes which are supplied with one polarity, and the four lead-out portions of each second inner conductor layer are connected to the remaining four outer electrodes which are supplied with the other polarity. A laminated capacitor disclosed in Japanese Unexamined Patent Application Publication No. 2002-151349 has such a structure that each first inner conductor layer of the laminated capacitor disclosed in PCT Japanese Translation Patent Publication No. 2002-508114 is divided into two in the direction of width thereof and each second inner conductor layer is also divided into two in the direction of width thereof.
In the laminated capacitor disclosed in PCT Japanese Translation Patent Publication No. 2002-508114, currents flowing through the lead-out portions at different polarities, which are adjacent to each other with the dielectric layer interposed therebetween, are directed opposed to each other so as to cancel magnetic fields generated by the currents flowing through the lead-out portions, whereby the ESL can be reduced. Also, the first inner conductor layer and the second inner conductor layer laminated with the dielectric layer interposed therebetween can provide sufficient electrostatic capacitance suitably used for decoupling.
On the other hand, in the laminated capacitor disclosed in Japanese Unexamined Patent Application Publication No. 2002-151349, currents flowing through divided two of the first inner conductor layer and currents flowing through divided two of the second inner conductor layer are directed opposed to each other per layer and between the layers so as to cancel magnetic fields generated by the currents flowing through the inner conductor layers. Therefore, the ESL can be further reduced in comparison with the laminated capacitor disclosed in PCT Japanese Translation Patent Publication No. 2002-508114.
However, because the laminated capacitor disclosed in Japanese Unexamined Patent Application Publication No. 2002-151349 has the structure that each first inner conductor layer of the laminated capacitor disclosed in PCT Japanese Translation Patent Publication No. 2002-508114 is divided into two in the direction of width thereof and each second inner conductor layer is also divided into two in the direction of width thereof, the electrostatic capacitance of the laminated capacitor disclosed in Japanese Unexamined Patent Application Publication No. 2002-151349 is smaller than that of the laminated capacitor disclosed in PCT Japanese Translation Patent Publication No. 2002-508114 for the reason that an area of the inner conductor layers opposed to each other with the dielectric layer interposed therebetween is reduced in the former. Stated another way, the laminated capacitor disclosed in Japanese Unexamined Patent Application Publication No. 2002-151349 is superior to the laminated capacitor disclosed in PCT Japanese Translation Patent Publication No. 2002-508114 in point of realizing lower ESL, but it is inferior to the laminated capacitor disclosed in PCT Japanese Translation Patent Publication No. 2002-508114 in point of realizing higher electrostatic capacitance.